Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - UART VERILOG TESTBENCH

Search list

[Com Port] UART

Description: 内含有完整的UART代码，包括发送和接受，且有testbench，可以直接仿真调试-Contain complete UART code, including send and receive and there testbench, can directly Simulation debugging
Platform: | Size: 9216 | Author: 李佳 | Hits:

[VHDL-FPGA-Verilog] UARTtransmitter

Description: UART Transmitter. VHDL code and its testbench.
Platform: | Size: 2048 | Author: mehmet | Hits:

[VHDL-FPGA-Verilog] uart2bus_latest.tar

Description: 文档详尽、已验证的UART工程，含有testbench文件。采用VHDL、Verilog语言编写。-Detailed documentation, has proven UART works with testbench file. Using VHDL, Verilog language.
Platform: | Size: 224256 | Author: robin | Hits:

[VHDL-FPGA-Verilog] UART

Description: UART发送verilog源码，波特率115200，以及testbench源码-Send verilog source UART baud rate 115200, and testbench source
Platform: | Size: 67584 | Author: 宁馫圈 | Hits:

[VHDL-FPGA-Verilog] verilog

Description: 这是一个uart串口实现16550的实现，代码已测试过了。-This is a 16550 uart serial port, the code has been tested before.
Platform: | Size: 35840 | Author: wangli | Hits:

[MPI] uart

Description: verilog实现UART收发源码 内有testbench-the UART transceiver Source for verilog implementation With testbench
Platform: | Size: 3072 | Author: 王军 | Hits:

[VHDL-FPGA-Verilog] uart

Description: uart veilog源码 含有testbench-uart verilog
Platform: | Size: 2048 | Author: 王维 | Hits:

[VHDL-FPGA-Verilog] UART-master

Description: UART通讯接口verilog代码实现，uart_tx子模块和uart_rx子模块，包含详细testbench-UART interface verilog code, uart_tx、uart_rx， testbench
Platform: | Size: 196608 | Author: lv | Hits:

[VHDL-FPGA-Verilog] uart

Description: 用Verilog实现FPGA的uart的串行通信功能，并附有testbench(The serial communication function of FPGA of UART is realized with Verilog, and Testbench is attached)
Platform: | Size: 308224 | Author: 怪了个乖 | Hits:

[VHDL-FPGA-Verilog] Uart-Verilog

Description: verilog实现串口通讯，包括verilog代码和testbench代码(verilog serial communication, including the verilog code and testbench Code)
Platform: | Size: 791552 | Author: 代工 | Hits:

[VHDL-FPGA-Verilog] uart_rx

Description: Verilog实现的RS232发送和接收程序，有完成的verilog代码，testbench等。(UART send and receive verilog code, including verilog source code, testbench etc.)
Platform: | Size: 452608 | Author: 66778899 | Hits:

CodeBus www.codebus.net